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ICSSSTUBF32866A - 25-Bit Configurable Registered Buffer for DDR2

ICSSSTUBF32866A_1078070.PDF Datasheet


 Full text search : 25-Bit Configurable Registered Buffer for DDR2


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GS8161E32D-166 GS8161E32D-166I GS8161E3T-200 GS816 14-Bit Registered Buffer With SSTL_2 Inputs and Outputs 48-TVSOP 0 to 70 100万1812k × 32的,12k × 36 35.7同步突发静态存储器
1M x 18, 512K x 32, 512K x 36 18Mb Sync Burst SRAMs 1M×18512k×32512k×36 18M位同步突发静态存储器
20-Bit SSTL_3 Interface Buffer With 3-State Outputs 64-TSSOP 0 to 70 100万1812k × 32的,12k × 36 35.7同步突发静态存储器
25-Bit Configurable Registered Buffer With Address-Parity Test 96-LFBGA 0 to 70 100万1812k × 32的,12k × 36 35.7同步突发静态存储器
1M x 18, 512K x 32, 512K x 36 18Mb Sync Burst SRAMs 1M×1812k×3212k×36 18M位同步突发静态存储器
Quad 2-input Exclusive-OR gates 14-PDIP 0 to 70 100万1812k × 32的,12k × 36 35.7同步突发静态存储器
25-Bit Configurable Registered Buffer with SSTL_18 Inputs and Outputs 96-LFBGA 0 to 70 100万1812k × 32的,12k × 36 35.7同步突发静态存储器
20-Bit SSTL_3 Interface Universal Bus Driver With 3-State Outputs 64-TSSOP 0 to 70
Quad 2-input Exclusive-OR gates 14-SOIC 0 to 70
13-Bit to 26-Bit Registered Buffer with SSTL_2 Inputs and Outputs 56-VQFN 0 to 70
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SSTUB32866EC_G SSTUB32866EC_S SSTUB32866 SSTUB3286    1.8 V 25-bit 1 : 1 or 14-bit 1 : 2 configurable registered buffer with parity for DDR2-800 RDIMM applications
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